The part you ship
Headers for every part sit in one tree. Context follows the part this board builds.
The build gives the context
ByteAsk Context indexes the functions and calls your compile commands select. The examples below show what was captured for this domain.
- The problem
- Headers and IP for every part sit in one tree. The compile commands pick the part
- This recording
- No header is resolved. The session looks up TKEEP and TSTRB in the Arm spec
Not a measured index. The quote and the session below are the recording.
How ByteAsk Context worksA protocol answer with a source
Recorded lookup: TKEEP and TSTRB, from the Arm spec, not from memory.
`TKEEP` and `TSTRB` answer different questions: - `TKEEP=1, TSTRB=1` -> data byte - `TKEEP=1, TSTRB=0` -> position byte - `TKEEP=0, TSTRB=0` -> null byte - `TKEEP=0, TSTRB=1` -> invalid/reserved
Read the full captured excerpt
I’m checking the AXI4-Stream spec text directly so the answer is based on the wire-level definition, not memory. 📚 fpga_ref · AXI4-Stream TKEEP TSTRB null byte position data byte pos… I found the byte-qualifier definitions. I’m checking the packet rule next, because AXI4-Stream distinguishes generic packets from the stricter continuous-packet model. 📚 fpga_ref · AXI4-Stream packet boundaries null bytes within packet c… 📚 ref_context · D2_AMBA_AXI4Stream_IHI0051B:2.5:19:0_ _Not found: D2_AMBA_AXI4Stream_IHI0051B:2.5:19:0__ I have the main rule already; I’m pulling the exact valid `TKEEP/TSTRB` combinations so I can answer the first part precisely. 📚 fpga_ref · AXI4-Stream Table 2-3 HIGH LOW position byte LOW HIGH re… `TKEEP` and `TSTRB` answer different questions: - `TKEEP=1, TSTRB=1` -> data byte - `TKEEP=1, TSTRB=0` -> position byte - `TKEEP=0, TSTRB=0` -> null byte - `TKEEP=0, TSTRB=1` -> invalid/reserved On `TKEEP` being low in the middle of a packet: in generic AXI4-Stream, null bytes exist, so `TKEEP=0` is not inherently illegal. But in the `Continuous_Packets` subset, it is not allowed before the last transfer. From `fpga_ref`, the decisive rule is: `"If TLAST is LOW, all bits of TKEEP must be HIGH."` On the final beat, zeros are only allowed in the upper unused byte lanes.
The source behind the answer
Arm AMBA 4 AXI4-Stream Protocol Specification (ARM IHI 0051B)
§2.5 Byte qualifiers · p.25
| TKEEP | TSTRB | Data type |
|---|---|---|
| HIGH | HIGH | Data byte |
| HIGH | LOW | Position byte |
| LOW | LOW | Null byte |
Retrieved with fpga_ref on 2026-09-18. Excerpt from the captured reference result.